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Intel Celeron 400

Published: (last update )

Core
Code nameMendocino
Base clock400 MHz
Turbo full / half / single-
Base multiplier
Technology250 nm
Transistors19 million
Die size154 mm2
Density0.12 M / mm2
Cores / threads1 / 1
Stepping-
Cache
L1 data cache16 kB
L1 inst. cache16 kB
L2 cache128 kB
L2 cache typeOn-die, full speed
L3 cache-
L3 cache type-
Instructions
Basic inst.x86, x87, MMX
Extended inst.
Extended inst. 2
Extended inst. 3
Extended inst. 4
The CPU
Bus typeSDR, 66 MHz, 64 bit
Bus bandwith528 MB/s
SocketSocket 370
Package370 pin PPGA
Package size50 x 50 mm
Manufacture date48th week of 1999
Voltage2 V
TDP24 W
Memory controller-
Integrated VGA-
Release date1999
Intel Celeron 400 (front side)

Intel Celeron 400 (front side)

Intel Celeron 400 (back side)

Intel Celeron 400 (back side)